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Ethos Tech One Pte. Ltd.

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Company Overview

Ethos Tech One Pte. Ltd. has not provided any information.

List of Open Positions

Sr Design Engineer (Physical Design)

Singapore Singapore, Singapore

Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and sp...

Full-time

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Sr /IC Design Engineer (Design Verification)

Singapore Singapore, Singapore

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Requirements

Full-time

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Sr Validation Enigneer (Post Silicon)

Singapore Singapore, Singapore

Main Responsibilities · Responsible for silicon function verification, performance optimization and silicon bring up · Debug and resolve silicon issues · Perform protocol compliance tests with a focus on high speed I/O Requirements · Relevant Bachelors/Masters degree in Engineering · 3 years or more of experience in high speed I/O Serdes design/ validation, pre/ post-silicon verification · Basic k...

Full-time

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Senior Embedded System Engineer

Singapore Singapore, Singapore

The role We are looking for a specialized software engineer who is passionate in Embedded System Developmetn work. You will be a member working with the very latest hardware and software technology. Requirements: • Strong embedded C/C++ programming skills. • Experience in software development on x86 and embedded systems, with focus on Linux-based platforms. • Experience in Linux BSP and Yocto Project for embedded platforms develo...

Full-time

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Sr /IC Design Engineer (Design Verification)

Singapore Singapore, Singapore

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Requirements

Full-time

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Sr /IC Design Engineer (Design Verification)

Singapore Singapore, Singapore

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Requirements Bac...

Full-time

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Staff/Senior Design Engineer (Design Verification)

Singapore Singapore, Singapore

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Requirements Bac...

Full-time

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Sr Design Engineer (Physical Design)

Singapore Singapore, Singapore

Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and sp...

Full-time

Sign in to view salary

Sr /IC Design Engineer (Design Verification)

Singapore Singapore, Singapore

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Requirements

Full-time

Sign in to view salary

Sr Design Engineer (Physical Design)

Singapore Singapore, Singapore

Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and sp...

Full-time

Sign in to view salary

Sr /IC Design Engineer (Design Verification)

Singapore Singapore, Singapore

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Requirements

Full-time

Sign in to view salary

Sr Design Engineer (Physical Design)

Singapore Singapore, Singapore

Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and sp...

Full-time

Sign in to view salary

Sr /IC Design Engineer (Design Verification)

Singapore Singapore, Singapore

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Requirements

Full-time

Sign in to view salary

Company Summary

Ethos Tech One Pte. Ltd.

Ethos Tech One Pte. Ltd.