- Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
- Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
- Build reusable testbench, constrained-random/directed test cases, and verification associated behavioural modules for both block levels and system levels.
- Use regression strategy, methodology and tool scripts and measure the function coverage.
Requirements:
- Degree in Electrical/Computer Engineering or Computer Science or equivalent.
- At least 5 years of experience in building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification.
- Strong knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, hardware and software co-verification methodology.
- Proficient with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
- Familiar with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.
If you are keen to apply for the position, kindly email your detailed resume in MS Word to [email protected]
Please note that only shortlisted candidates will be notified.
For more job opportunities, please visit our website at www.recruit-expert.com
EA Licence: 19C9701
Registration: R1326740
